Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

16 by 16 Bit Complex Multiplier

The PDSP16116A will multiply two complex (16 + 16) bit words every 50ns and can be configured to output the complete complex (32 + 32) bit result within a single cycle. The data format is fractional twos complement. FEATURES ■ Complex Number (16 + 16) X (16 + 16) Multiplication ■ Full 32 bit Re

Stand Alone FFT Processor

The PDSP16515A performs Forward or Inverse Fast Fourier Transforms on complex or real data sets containing up to 1024 points. Data and coefficient input are both represented by 16 bits. Data is expanded internally to 18 bits and subject to Block Floating Point arithmetic to preserve a greater dyna

Stand Alone FFT Processor

The PDSP16510 performs Forward or Inverse Fast Fourier Transforms on complex or real data sets containing up to 1024 points. Data and coefficients are each represented by 16 bits, with block floating point arithmetic for increased dynamic range. FEATURES ■ Completely self contained FFT Processor

Programmable FIR Filter

文件：268.95 Kbytes Page：24 Pages

Programmable FIR Filter

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Description The PDSP16256 contains sixteen multiplier - accumulators, which can be multi cycled to provide from 16 to 128 stages of digital filtering. Input data and coefficients are both represented by 16-bit two’s complement numbers with coefficients converted internally to 12 bits and the resu

Programmable FIR Filter

Programmable FIR Filter

文件：268.95 Kbytes Page：24 Pages

I/Q Splitter/NCO

Programmable FIR Filter

文件：268.95 Kbytes Page：24 Pages

I/Q Splitter/NCO

文件：121.3 Kbytes Page：12 Pages

Hook and Loop – Ties

文件：150.81 Kbytes Page：2 Pages

~15째 smooth spot beam

文件：5.9586 Mbytes Page：7 Pages

16-Channel Midi Synthesizer with 256K X 16 ROM

文件：570.73 Kbytes Page：17 Pages

16-Channel Midi Synthesizer with 256K X 16 ROM

文件：570.73 Kbytes Page：17 Pages