Quad 6-bit multiplexed I2C EEPROM DIP switch

DESCRIPTION The PCA9561 is a 20-pin CMOS device consisting of four 6-bit non-volatile EEPROM registers, 6 hardware pin inputs and a 6-bit multiplexed output. It is used for DIP switch-free or jumper-less system configuration and supports Mobile and Desktop VID Configuration, where 5 preset values

Quad 6-bit multiplexed I2C EEPROM DIP switch

文件：133 Kbytes Page：17 Pages

Smart, simple solutions for the 12 most common design concerns

Quad 6-bit multiplexed I2C EEPROM DIP switch

文件：133 Kbytes Page：17 Pages

Quad 6-bit multiplexed I2C EEPROM DIP switch

文件：133 Kbytes Page：17 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC INTERFACE SPECIALIZED 20SO 集成电路（IC） 专用

Quad 6-bit multiplexed I2C EEPROM DIP switch

文件：133 Kbytes Page：17 Pages

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：托盘 描述：IC INTERFACE SPECIALIZED 20TSSOP 集成电路（IC） 专用

Pulse Width Modulator

GENERAL DESCRIPTION The AD9561 is a second generation high speed, digitally programmable pulse width modulator (PWM). Output pulse width is proportional to an 8-bit DATA input value. Two additional control inputs determine if the pulse is placed at the beginning, middle or end of the clock period

Pulse Width Modulator

GENERAL DESCRIPTION The AD9561 is a second generation high speed, digitally programmable pulse width modulator (PWM). Output pulse width is proportional to an 8-bit DATA input value. Two additional control inputs determine if the pulse is placed at the beginning, middle or end of the clock period

Pulse Width Modulator

GENERAL DESCRIPTION The AD9561 is a second generation high speed, digitally programmable pulse width modulator (PWM). Output pulse width is proportional to an 8-bit DATA input value. Two additional control inputs determine if the pulse is placed at the beginning, middle or end of the clock period

P-Channel 40 V (D-S) MOSFET

文件：1.00313 Mbytes Page：9 Pages

P-Channel 40 V (D-S) MOSFET

文件：1.00301 Mbytes Page：9 Pages