5-bit multiplexed/1-bit latched 6-bit I2C EEPROM

DESCRIPTION The primary function of the 5-bit multiplexer, 1-bit latch is to enable system configuration. FEATURES • 5-bit 2-to-1 multiplexer, 1-bit latch • 6-bit internal non-volatile register • Internal non-volatile register programmable and readable via I2C bus • Override input forces all

Smart, simple solutions for the 12 most common design concerns

5-bit multiplexed/1-bit latched 6-bit I2C EEPROM

5-bit multiplexed/1-bit latched 6-bit I2C EEPROM

DESCRIPTION The primary function of the 5-bit multiplexer, 1-bit latch is to enable system configuration. FEATURES • 5-bit 2-to-1 multiplexer, 1-bit latch • 6-bit internal non-volatile register • Internal non-volatile register programmable and readable via I2C bus • Override input forces all

5-bit multiplexed/1-bit latched 6-bit I2C EEPROM

DESCRIPTION The primary function of the 5-bit multiplexer, 1-bit latch is to enable system configuration. FEATURES • 5-bit 2-to-1 multiplexer, 1-bit latch • 6-bit internal non-volatile register • Internal non-volatile register programmable and readable via I2C bus • Override input forces all

5位多路复用/1位闭锁的6位I2C EEPROM DIP开关

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC INTERFACE SPECIALIZED 20TSSOP 集成电路（IC） 专用

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：托盘 描述：IC INTERFACE SPECIALIZED 20TSSOP 集成电路（IC） 专用

High Perform Instr, 9 Pr #18 Str TC, PVC Ins E2, OS, PVC Jkt, PLTC

Product Description High Performance Instrumentation, 9 Pair 18AWG (19x30) Tinned Copper, PVC Insulation E2 Color Code, Overall Beldfoil® Shield, PVC Outer Jacket, PLTC

300V Power-Limited Tray Cables ??Overview

文件：1.05773 Mbytes Page：22 Pages

Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator

文件：1.68824 Mbytes Page：120 Pages

Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator

文件：1.68824 Mbytes Page：120 Pages

Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator

文件：1.68824 Mbytes Page：120 Pages