Reprogrammable CMOS PAL Device

Features • Advanced second-generation PAL® architecture • Low power — 55 mA max. “L” — 90 mA max. standard — 120 mA max. military • CMOS EPROM technology for reprogrammability • Variable product terms — 2 x (8 through 16) product terms • User-programmable macrocell —

HIGH-PERFORMANCE IMPACT-X E PROGRAMMABLE ARRAY LOGIC CIRCUITS

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Reprogrammable CMOS PAL Device

EPICE CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS

EPICE CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS

文件：202.83 Kbytes Page：22 Pages

EPICE CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS

文件：202.83 Kbytes Page：22 Pages

封装/外壳：24-CDIP（0.300"，7.62mm） 包装：管件 描述：IC PLD 10MC 25NS 24CDIP 集成电路（IC） PLD（可编程逻辑器件）

EPICE CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS

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High Performance E2CMOS PLD Generic Array Logic

Description The GAL22V10, at 4ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest performance available of any 22V10 device on the market. CMOS circuitry allows the GAL22V10 to consume much les

PAL22V10 Family, AmPAL22V10/A 24-Pin TTL Versatile PAL Device

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High Speed UV Erasable Programmable Logic Device

文件：277.9 Kbytes Page：11 Pages

High Speed UV Erasable Programmable Logic Device

文件：217.63 Kbytes Page：9 Pages

High Speed UV Erasable Programmable Logic Device

文件：277.9 Kbytes Page：11 Pages