128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-I is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-T is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl

128K X 8 BIT LOW VOLTAGE CMOS SRAM

General Description The LP62S1024B-T is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a low power voltage: 2.7V to 3.6V. It is built using AMICs high performance CMOS process. Inputs and three-state outputs are TTL compatibl