Description

The MC100LVELT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the low skew, dual gate design of the LVELT22 makes it ideal for applications which require the translation of a clock and a data signal.

Features

• 350 ps Typical Propagation Delay

• <100 ps Output−to−Output Skew

• Flow Through Pinouts

• The 100 Series Contains Temperature Compensation

• LVPECL Operating Range: VCC = 3.0 V to 3.8 V with GND = 0 V

• When Unused TTL Input is left Open, Q Output will Default High

• Pb−Free Packages are Available