•Operating characteristics

—Voltage range: 2.97 V to 5.5 V

—Ambient temperature range: -40 °C to 125 °C for all power modes

•Arm™ Cortex-M7 core, 32-bit CPU

—M7 supports up to 300 MHz frequency with 2.14 DMIPS / MHz

—Arm Core based on the Armv7 and Thumb®-2 ISA

—Integrated Digital Signal Processor (DSP)

—Configurable Nested Vectored Interrupt Controller (NVIC)

—Single Precision Floating Point Unit (FPU)

•Clock interfaces

—8 - 40 MHz Fast External Oscillator (FXOSC)

—48 MHz Fast Internal RC oscillator (FIRC)

—32 kHz Low Power Oscillator (SIRC)

—32 kHz Slow External Oscillator (SXOSC)

—System Phased Lock Loop (SPLL)

•I/O and package

—LQFP48, MAXQFP100, MAXQFP172, MAPBGA257, MAPBGA289, MaxQFP172 with Exposed pad (EP) package options

•Up to 32-channel DMA with up to 128 request sources using DMAMUX

•Memory and memory interfaces

—Up to 8 MB program flash memory with ECC

—Up to 128 K of flexible program or data flash memory

—Up to 512 KB SRAM with ECC, includes 192 KB of TCM RAM ensuring maximum CPU performance of fast control loops with minimal latency

—Data and instruction cache for each core to minimize performance impact of memory access latencies

—QuadSPI support

•Mixed-signal analog

—Up to three 12-bit Analog-to-Digital Converters (ADC) with up to 24 channel analog inputs per module

—One Temperature Sensor (TempSense)

—Up to three Analog Comparators (CMP), with each comparator having an internal 8-bit DAC

•Human-Machine Interface (HMI)

—Up to 235 GPIO pins

—Non-Maskable Interrupt (NMI)

—Up to 60 pins with wakeup capability

—Up to 32 pins with interrupt support

•Power management

—Low-power Arm Cortex-M7 core with excellent energy efficiency, balanced with performance

—Power Management Controller (PMC) with simplified mode management (RUN and STANDBY)

—Supports peripheral specific clock gating. Only specific peripherals remain working in low power modes.

•Communications interfaces

—Up to 16 serial communication interface (LPUART) modules, with LIN, UART and DMA support

—Up to six Low Power Serial Peripheral Interface (LPSPI) modules with DMA support

—Up to two Low Power Inter-Integrated Circuit (LPI2C) modules with DMA support

—Up to six FlexCAN modules (with optional CAN-FD support)

—FlexIO module for flexible and high performance serial interfaces

—Up to two Ethernet module

—Up to two Synchronous Audio Interface (SAI) modules

•Reliability, safety and security

—Hardware Security Engine (HSE_B) - Supports AES accelerator(for K388 only)

—Up to two Internal Software Watchdog Timers (SWT)

—Error-Correcting Code (ECC) on all memories

—Error Detection Code (EDC) on data path

—Cyclic Redundancy Check (CRC) module

—120-bit Unique Identification (ID) number

—Extended Cross domain Domain Controller (XRDC), providing protection for master core access rights

—Virtualization Wrapper (VIRT_WRAPPER), providing I/O protection

•Debug functionality

—Serial Wire JTAG debug Port (SWJ-DP), with 2 pin Serial Wire Debug (SWD) for external debugger

—Debug Watchpoint and Trace (DWT), with four configurable comparators as hardware watchpoints

—Serial Wire Output (SWO)-synchronous trace data support

—Instrumentation Trace Macrocell (ITM) with software and hardware trace, plus time stamping

—CoreSight AHB Trace Macrocell (HTM)

—Flash Patch and Breakpoints (FPB) with ability to patch code and data from code space to system space

—Serial Wire Viewer (SWV): A trace capability providing displays of reads, writes, exceptions, PC Samples and print

—Full data trace for up to 16 output wide

—Embedded Cross Trigger (ECT) is used for multicore run-control and trace cross triggering, using CoreSight Cross Trigger Interface (CTI)

•Timing and control

—Up to three enhanced modular I/O system (eMIOS), offering up to 72 timer channels (IC/OC/PWM)

—Up to two System Timer Modules (STM)

—Up to two Logic Control Units (LCU)

—Full cross triggering support for ADC / timer (BCTU)

—One Trigger MUX Control (TRGMUX) module

—Up to three Periodic Interrupt Timer (PIT) modules

—32-bit Real Time Counter (RTC) with autonomous periodic interrupt (API) function