Features and benefits

• I2C-bus to parallel port expander

• Operating power supply voltage range of 1.65 V to 5.5 V

• Allows bidirectional voltage-level translation and GPIO expansion between:

– 1.8 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P

– 2.5 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P

– 3.3 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P

– 5 V SCL/SDA and 1.8 V, 2.5 V, 3.3 V or 5 V Port P

• Low standby current consumption:

– 1.5 μA typical at 5 V VDD

– 1.0 μA typical at 3.3 V VDD

• Schmitt trigger action allows slow input transition and better switching noise immunity

at the SCL and SDA inputs

– Vhys = 0.18 V (typical) at 1.8 V

– Vhys = 0.25 V (typical) at 2.5 V

– Vhys = 0.33 V (typical) at 3.3 V

– Vhys = 0.5 V (typical) at 5 V

• 5 V tolerant I/O ports

• Active LOW reset input (RESET)

• Open-drain active LOW interrupt output (INT)

• 400 kHz Fast-mode I2C-bus

• Internal power-on reset

• Power-up with all channels configured as inputs

• No glitch on power-up

• Noise filter on SCL/SDA inputs

• Latched outputs with 25 mA drive maximum capability for directly driving LEDs

• Latch-up performance exceeds 100 mA per JESD 78, Class II

• ESD protection exceeds JESD 22

– 2000 V Human-Body Model (A114-A)

– 1000 V Charged-Device Model (C101)

• Packages offered: TSSOP24, HWQFN24, VFBGA24, X2QFN24 (LGA, Land Grid Array)

2.1 Agile I/O features

• Software backward compatible with PCA6416A with interrupts disabled at power-up

• Pin-to-pin drop-in replacement with PCA6416A

• Output port configuration: bank selectable push-pull or open-drain output stages

• Interrupt status: read-only register identifies the source of an interrupt

• Bit-wise I/O programming features:

– Output drive strength: four programmable drive strengths to reduce rise and fall times

in low-capacitance applications

– Input latch: Input Port register values changes are kept until the Input Port register is

read

– Pull-up/pull-down enable: floating input or pull-up/pull-down resistor enable

– Pull-up/pull-down selection: 100 kΩ pull-up/pull-down resistor selection

– Interrupt mask: mask prevents the generation of the interrupt when input changes

state to prevent spurious interrupts