General description

The PCA9501 is an 8-bit I/O expander with an on-board 2-kbit EEPROM.

The I/O expandable eight quasi-bidirectional data pins can be independently assigned as inputs or outputs to monitor board level status or activate indicator devices such as LEDs. The system master writes to the I/O configuration bits in the same way as for the PCF8574. The data for each input or output is kept in the corresponding input or output register. The system master can read all registers.

The EEPROM can be used to store error codes or board manufacturing data for read-back by application software for diagnostic purposes and are included in the I/O expander package.

The PCA9501 active LOW open-drain interrupt output is activated when any input state differs from its corresponding input port register state. It is used to indicate to the system master that an input state has changed and the device needs to be interrogated.

The PCA9501 has six address pins with internal pull-up resistors allowing up to 64 devices to share the common two-wire I2C-bus software protocol serial data bus. The fixed GPIO address starts with ‘0’ and the fixed EEPROM I2C-bus address starts with ‘1’, so the PCA9501 appears as two separate devices to the bus master.

The PCA9501 supports hot insertion to facilitate usage in removable cards on backplane systems.

Features

■ 8 general purpose input/output expander/collector

■ Replacement for PCF8574 with integrated 2-kbit EEPROM

■ Internal 256 × 8 EEPROM

■ Self timed write cycle (5 ms typical)

■ 16 byte page write operation

■ I2C-bus and SMBus interface logic

■ Internal power-on reset

■ Noise filter on SCL/SDA inputs

■ Active LOW interrupt output

■ 6 address pins allowing up to 64 devices on the I2C-bus/SMBus

■ No glitch on power-up

■ Supports hot insertion

■ Power-up with all channels configured as inputs

■ Low standby current

■ Operating power supply voltage range of 2.5 V to 3.6 V

■ 5 V tolerant inputs/outputs

■ 0 Hz to 400 kHz clock frequency

■ ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per

JESD22-A115 and 1000 V CDM per JESD22-C101

■ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

■ Packages offered: SO20, TSSOP20, HVQFN20

Applications

■ Board version tracking and configuration

■ Board health monitoring and status reporting

■ Multi-card systems in telecom, networking, and base station infrastructure equipment

■ Field recall and troubleshooting functions for installed boards

■ General-purpose integrated I/O with memory

■ Replacement for PCF8574 with integrated 2-kbit EEPROM

■ Bus master sees GPIO and EEPROM as two separate devices

■ Six hardware address pins allow up to 64 PCA9501s to be located in the same

I2C-bus/SMBus