Features

The main features of the M•CORE are as follows:

• 32-bit load/store RISC architecture

• Fixed 16-bit instruction length

• 16-entry, 32-bit general-purpose register file

• Efficient 4-stage execution pipeline, hidden from application software

• Single-cycle instruction execution for many instructions

• Two cycles for taken branches and memory access instructions

• Support for byte, halfword, and word memory accesses

• Fast interrupt support with 16-entry dedicated alternate register file

• Vectored and autovectored interrupt support