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C5NPD0-DSD中文资料

厂家型号

C5NPD0-DSD

文件大小

2679.71Kbytes

页面数量

100

功能描述

C-5 NETWORK PROCESSOR SILICON REVISION D0

数据手册

下载地址一下载地址二到原厂下载

生产厂商

NXP Semiconductors

简称

nxp恩智浦

中文名称

恩智浦半导体公司官网

C5NPD0-DSD数据手册规格书PDF详情

Feature

Complete programmability

• Programmability at all levels of the protocol stack: Layers 2-7

• Examples of C-5 enabled systems:

– Multiservice Access Platforms (MSAPs)

– Optical edge switch/routers

– IP Gigabit/Terabit routers

– WAN Customer Premises Equipment (CPE)

– Load balancing web server switches

Simple programming model

• C/C++ programmable

• Standard instruction set

• Standard Applications Programming Interface (C-Ware APITM)

• Comprehensive C-WareTM Software Toolset (easy to program, debug, and tune

applications)

Maximum system flexibility

• Software implementation of functions from physical interfaces through switching

fabric support

• Reprogram to support new functionality and ratified standards, improving your

time-in-marketTM metric

• Deliver new services to market through simple software upgrades — no forklift

Massive processing power

• Operating frequencies: 166MHz, 200MHz, and 233MHz

• 5Gbps of bandwidth (for non-blocking throughput)

• More than 3,000MIPs of computing power (for adding services throughout the

protocol stack)

• Up to 15 million packets per second transmitted at wire speed

• 17 programmable RISC Cores (for cell/packet forwarding)

• 32 programmable Serial Data Processors (for processing bit streams)

• Up to 133 million table lookups per second

• Three internal buses for 60Gb of aggregate bandwidth

High functional integration

• 838 pin Ball Grid Array (BGA) package

• 16 Channel Processors including:

– Embedded OC-3c, OC-12, OC-12c SONET framers

– Programmable MAC interface

– RISC Cores

– Programmable pin PHY interfaces

• Embedded coprocessors for table lookup (classification), buffer memory (payload

control), and queue management (CoS/QoS implementation)

• Dedicated Fabric Processor and port

• Embedded RISC Executive Processor

• Integrated 32bit/66MHz PCI bus

Stable programming interfaces

• Supports generic communications programming interfaces to simplify programming

and allow future reuse of code across generations of the processor

• Network Processing Forum (NPF), (formerly CPIX), Charter member

Third-party support

• Support for virtually any third-party protocol stack, PHY or fabric interface, and

industry standard tools

• Smart Networks Alliance Program ensures a wide range of verified solutions

更新时间:2025-5-18 15:00:00
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