General description

The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.

Features

■ Balanced propagation delays

■ All inputs have Schmitt-trigger actions

■ Inputs accept voltages higher than VCC

■ Input levels:

◆ For 74AHC74: CMOS level

◆ For 74AHCT74: TTL level

■ ESD protection:

◆ HBM EIA/JESD22-A114E exceeds 2000 V

◆ MM EIA/JESD22-A115-A exceeds 200 V

◆ CDM EIA/JESD22-C101C exceeds 1000 V

■ Multiple package options

■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C