1. General description

The 74LVT16373A is a 16-bit D-type transparent latch with 3-state outputs. The device can be

used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features

two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling

8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are

transparent, a latch output will change each time its corresponding D-input changes. When nLE is

LOW the latches store the information that was present at the inputs a set-up time preceding the

HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance

OFF-state. Operation of the nOE input does not affect the state of the latches. Bus hold data inputs

eliminate the need for external pull-up resistors to define unused inputs

2. Features and benefits

• 16-bit transparent latch

• 3-state buffers

• Wide supply voltage range from 2.7 to 3.6 V

• BiCMOS high speed and output drive

• Output capability: +64 mA/–32 mA

• Direct interface with TTL levels

• Overvoltage tolerant inputs to 5.5 V

• Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs

• Live insertion/extraction permitted

• Power-up reset

• Power-up 3-state

• No bus current loading when output is tied to 5 V bus

• IOFF circuitry provides partial Power-down mode operation

• Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

• Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

• ESD protection:

• HBM: JESD22-A114F exceeds 2000 V

• MM: JESD22-A115-A exceeds 200 V

• Specified from -40 °C to 85 °C