位置:74LVC74A-Q100 > 74LVC74A-Q100详情

74LVC74A-Q100中文资料

厂家型号

74LVC74A-Q100

文件大小

722.92Kbytes

页面数量

18

功能描述

Dual D-type flip-flop with set and reset; positive-edge trigger

数据手册

下载地址一下载地址二到原厂下载

生产厂商

NEXPERIA

74LVC74A-Q100数据手册规格书PDF详情

General description

The 74LVC74A-Q100 is a dual edge triggered D-type flip-flop. It has individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs.

The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.

Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and fall times.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

■ Automotive product qualification in accordance with AEC-Q100 (Grade 1)

◆ Specified from -40 °C to +85 °C and from -40 °C to +125 °C

■ 5 V tolerant inputs for interlacing with 5 V logic

■ Wide supply voltage range from 1.2 V to 3.6 V

■ CMOS low power consumption

■ Direct interface with TTL levels

■ ESD protection:

◆ MIL-STD-883, method 3015 exceeds 2000 V

◆ HBM JESD22-A114F exceeds 2000 V

◆ MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)

■ Multiple package options

更新时间:2025-10-18 9:29:00
供应商 型号 品牌 批号 封装 库存 备注 价格
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恩XP
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