位置:74LVC162373A > 74LVC162373A详情
74LVC162373A中文资料
74LVC162373A数据手册规格书PDF详情
1. General description
The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with 30 Ω
termination resistors and 3-state outputs. The 74LVCH162373A has separate D-type inputs with
bus hold for each latch. Both devices can be used as two 8-bit transparent latches or a single 16-
bit transparent latch. Both devices feature two latch enables (1LE and 2LE) and two output enables
(1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches.
In this condition the latches are transparent, a latch output will change each time its corresponding
D-input changes. When nLE is LOW the latches store the information that was present at the inputs
a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to
assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the
latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in mixed 3.3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
These devices are fully specified for partial power down applications using IOFF. The IOFF circuitry
disables the output, preventing the potentially damaging backflow current through the devices
when they are powered down.
2. Features and benefits
• Overvoltage tolerant inputs to 5.5 V
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Multibyte flow-through standard pinout architecture
• Multiple low inductance supply pins for minimum noise and ground bounce
• Direct interface with TTL levels
• All data inputs have bus hold (74LVCH162373A only)
• IOFF circuitry provides partial Power-down mode operation
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
74LVC162373A产品属性
- 类型
描述
- 型号
74LVC162373A
- 功能描述
闭锁 3.3V 16 D-TP TRNSP LTCH 30 OHM
- RoHS
否
- 制造商
Micrel
- 电路数量
1
- 逻辑类型
CMOS
- 逻辑系列
TTL
- 极性
Non-Inverting
- 输出线路数量
9
- 电源电压-最大
12 V
- 电源电压-最小
5 V
- 最大工作温度
+ 85 C
- 最小工作温度
- 40 C
- 封装/箱体
SOIC-16
- 封装
Reel
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NEXPERIA/安世 |
25+ |
SOT370-1 |
600000 |
NEXPERIA/安世全新特价74LVC162373ADL即刻询购立享优惠#长期有排单订 |
|||
Nexperia(安世) |
24+ |
SSOP48300mil |
1612 |
只做原装,提供一站式配单服务,代工代料。BOM配单 |
|||
NEXPERIA |
24+ |
con |
35960 |
查现货到京北通宇商城 |
|||
Nexperia |
23+ |
TO-18 |
12800 |
原装正品代理商最优惠价格 现货或订货 |
|||
NEXPERIA/安世 |
25+ |
SOT362 |
20000 |
全新原装现货库存 |
|||
NEXPERIA/安世 |
24+ |
原厂原封可拆样 |
65258 |
百分百原装现货,实单必成 |
|||
NEXPERIA/安世 |
25+ |
SMD |
8880 |
原装认准芯泽盛世! |
|||
NEXPERIA/安世 |
21+22+ |
SOT362 |
20000 |
原装现货 价格优势 |
|||
NEXPERIA/安世 |
22+ |
SMD |
12245 |
现货,原厂原装假一罚十! |
|||
Nexperia(安世) |
2021+ |
TSSOP-48 |
503 |
74LVC162373ADGG:11 价格
参考价格:¥2.1829
74LVC162373A 资料下载更多...
74LVC162373A 芯片相关型号
Datasheet数据表PDF页码索引
- P1
- P2
- P3
- P4
- P5
- P6
- P7
- P8
- P9
- P10
- P11
- P12
- P13
- P14
- P15
- P16
- P17
- P18
- P19
- P20
- P21
- P22
- P23
- P24
- P25
- P26
- P27
- P28
- P29
- P30
- P31
- P32
- P33
- P34
- P35
- P36
- P37
- P38
- P39
- P40
- P41
- P42
- P43
- P44
- P45
- P46
- P47
- P48
- P49
- P50
- P51
- P52
- P53
- P54
- P55
- P56
- P57
- P58
- P59
- P60
- P61
- P62
- P63
- P64
- P65
- P66
- P67
- P68
- P69
- P70
- P71
- P72
- P73
- P74
- P75
- P76
- P77
- P78
- P79
- P80
- P81
- P82
- P83
- P84
- P85
- P86
- P87
- P88
- P89
- P90
- P91
- P92
- P93
- P94
- P95
- P96
- P97
- P98
- P99
- P100
- P101
- P102
- P103
- P104
- P105
- P106
