1. General description

The 74HC158 is a high-speed Si-gate CMOS device and is pin compatible with low power

Schottky TTL (LSTTL). The 74HC158 is specified in compliance with JEDEC

standard no. 7A.

The 74HC158 is a quad 2-input multiplexer which select 4 bits of data from two sources

and are controlled by a common data select input (S). The four outputs present the

selected data in the inverted form. The enable input (E) is active LOW.

When E is HIGH, all the outputs (1Y to 4Y) are forced HIGH regardless of all other input

conditions.

Moving the data from two groups of registers to four common output buses is a common

use of the 74HC158. The state of S determines the particular register from which the data

comes. It can also be used as a function generator.

The device is useful for implementing highly irregular logic by generating any four of the

16 different functions of two variables with one variable common.

The 74HC158 is the logic implementation of a 4-pole, 2-position switch, where the

position of the switch is determined by the logic levels applied to S.

The logic equations for the output are:

1Y = E.(1l1.S  1l0.S)

2Y = E.(2l1.S  2l0.S)

3Y = E.(3l1.S  3l0.S)

4Y = E.(4l1.S  4l0.S)

The 74HC158 is identical to the 74HC157 but has inverting outputs.

2. Features and benefits

 Low-power dissipation

 Inverting data path

 Complies with JEDEC standard no. 7A

 ESD protection:

 HBM JESD22-A114F exceeds 2 000 V

 MM JESD22-A115-A exceeds 200 V

 Multiple package options



74HC158

Quad 2-input multiplexer; inverting

Rev. 4 — 23 December 2015 Product data sheet

Specified from −40° C to +85 °C and −40 °C to +125 °C