输入 Mux - 2:1 差分，1.8 V，时钟/数据扇出缓冲器 - 1:6 CML，1.2 V / 1.8 V

The NB7V586M is a differential 1-to-6 CML Clock/Data Distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INxb inputs incorporate internal 50-ohm termination resistors and will accept differential LVPECL, CML, or LVDS logic levels. The INx/INxb inputs and • Maximum Input Data Rate > 10 Gb/s Typical\n• Data Dependent Jitter \n• Maximum Input Clock Frequency > 6 GHz Typical\n• Random Clock Jitter \n• Low Skew 1:6 CML Outputs, 30 ps Max\n• 2:1 MultiLevel Mux Inputs\n• 175 ps Typical Propagation Delay\n• 50 ps Typical Rise and Fall Times\n• Differential ;

1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer / Translator

文件：139.79 Kbytes Page：8 Pages

1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer / Translator

文件：139.79 Kbytes Page：8 Pages

封装/外壳：32-VFQFN 裸露焊盘 包装：管件 描述：IC CLK BUFFER 2:6 6GHZ 32QFN 集成电路（IC） 时钟缓冲器，驱动器

1.8V Differential 2:1 Mux Input to 1.2V/1.8V 1:6 CML Clock/Data Fanout Buffer / Translator

文件：139.79 Kbytes Page：8 Pages

封装/外壳：32-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC CLK BUFFER 2:6 6GHZ 32QFN 集成电路（IC） 时钟缓冲器，驱动器