输入 Mux — 2:1 差分，2.5 V / 3.3 V，时钟/数据扇出缓冲器 — 1:6 LVPECL

The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INxb inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7L585 produces six identical out • Maximum Input Data Rate > 8 Gb/s\n• Data Dependent Jitter \n• Maximum Input Clock Frequency > 5 GHz\n• Random Clock Jitter \n• Low Skew 1:6 LVPECL Outputs, 20 ps max\n• 2:1 MultiLevel Mux Inputs\n• 175 ps Typical Propagation Delay\n• 55 ps Typical Rise and Fall Times\n• Differential LVPECL Outputs;

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer Translator

文件：94.52 Kbytes Page：9 Pages

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator

文件：159.57 Kbytes Page：9 Pages

NB7L585R: Input Mux - 2:1 Differential, 2.5 V / 3.3 V, Clock / Data Fanout Buffer - 1:6 RSECL, 7 GHz / 10 Gbps

The NB7L585R is a differential 1:6 RSECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INx inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7L585R produces six identical out Maximum Input Data Rate > 10 Gb/s Typical\nData Dependent Jitter \nMaximum Input Clock Frequency > 7 GHz Typical\nRandom Clock Jitter \nLow Skew 1:6 RSECL Outputs, 20 ps max\n2:1 Multi-Level Mux Inputs\nDifferential RSECL Outputs, 400 mV peak-to-peak, typical\nOperating Range: VCC = 2.375 V to 3.6 V;

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer Translator

文件：94.52 Kbytes Page：9 Pages

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer Translator

文件：94.52 Kbytes Page：9 Pages

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator

文件：159.57 Kbytes Page：9 Pages

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator

文件：159.57 Kbytes Page：9 Pages

封装/外壳：32-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK BUFFER 1:6 5GHZ 32QFN 集成电路（IC） 时钟缓冲器，驱动器

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer Translator

文件：94.52 Kbytes Page：9 Pages

2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer Translator

文件：94.52 Kbytes Page：9 Pages

封装/外壳：32-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK BUFFER 1:6 LVPECL 32QFN 集成电路（IC） 时钟缓冲器，驱动器

2.5V/3.3V, 7GHz/10Gbps Differential 2:1 Mux Input to 1:6 RSECL Clock/Data Fanout Buffer / Translator

文件：160.9 Kbytes Page：9 Pages

2.5V/3.3V, 7GHz/10Gbps Differential 2:1 Mux Input to 1:6 RSECL Clock/Data Fanout Buffer / Translator

文件：160.9 Kbytes Page：9 Pages

2.5V/3.3V, 7GHz/10Gbps Differential 2:1 Mux Input to 1:6 RSECL Clock/Data Fanout Buffer / Translator

文件：160.9 Kbytes Page：9 Pages