Clock / Data Driver, 2:1:10 Differential, 6.125 Gbps, 2.5 V / 3.3 V, with CML Output

The NB7L111M is a low skew 2:1:10 differential clock/data driver, designed with clock/data distribution in mind. It accepts two clock/data sources into multiplexer input and reproduces ten identical CML differential outputs. This device is ideal for clock/data distribution across the backplane or a • Maximum Input Clock Frequency > 5.5 GHz Typical\n• Maximum Input Data Rate > 6.125 Gb/s Typical\n• \n• \n• 50 ps Typical Rise and Fall Times\n• 240 ps Typical Propagation Delay\n• 2 ps Typical Duty Cycle Skew\n• 10 ps Typical Within Device Skew\n• 15 ps Typical Device-to-Device Skew\n• Operating R;

2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output

文件：256.95 Kbytes Page：13 Pages

2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output

文件：256.95 Kbytes Page：13 Pages

2.5V / 3.3V, 6.125Gb/s 1:10 Differential Clock/Data Driver with CML Output

文件：256.95 Kbytes Page：13 Pages

封装/外壳：52-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK BUFFER 2:10 5.5GHZ 52QFN 集成电路（IC） 时钟缓冲器，驱动器

封装/外壳：52-VFQFN 裸露焊盘 包装：卷带（TR） 描述：IC CLK BUFFER 2:10 5.5GHZ 52QFN 集成电路（IC） 时钟缓冲器，驱动器