74181, LS181, 5181 Arithmetic Logic Units 4-Blt Arithmetlc Loglc Unit Product Speciflcation

FEATURES • Provides 16 arithmetic operations: ADO, SUBTRACT, COMPARE, DOUBLE, plus 12 other arithmetic operations • Provides all 16 logic operations of two variables: Exclusive·OR, Compare, AND, NAND, NOR, OR, plus 10 other logic operatlons • Full lookahead carry for highspeed arithmetic

Octal transparent latch 3-State

DESCRIPTION The 74F373 is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates. The data on the D inputs is transferred to the latch outputs when the enable (E) input is

Buffers/drivers

DESCRIPTION The 74F455 and 74F456 are octal buffers and line drivers with parity generation/checking designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers. These parts include parity generator/checker to improve PC board density. FEATURES • H

Buffers/drivers

DESCRIPTION The 74F455 and 74F456 are octal buffers and line drivers with parity generation/checking designed to be employed as memory address drivers, clock drivers and bus-oriented transmitters/receivers. These parts include parity generator/checker to improve PC board density. FEATURES • H

Octal bus transceiver, inverting 3tate

DESCRIPTION The 74F620 is an octal transceiver featuring inverting 3-State bus-compatible outputs in both send and receive directions. The outputs are capable of sinking 64mA and sourcing up to 15mA, providing very good capacitive drive characteristics. The 74F623 is a non-inverting version of th

Octal bus transceiver, inverting 3tate

DESCRIPTION The 74F620 is an octal transceiver featuring inverting 3-State bus-compatible outputs in both send and receive directions. The outputs are capable of sinking 64mA and sourcing up to 15mA, providing very good capacitive drive characteristics. The 74F623 is a non-inverting version of th

Octal bus transceiver, inverting 3tate

DESCRIPTION The 74F620 is an octal transceiver featuring inverting 3-State bus-compatible outputs in both send and receive directions. The outputs are capable of sinking 64mA and sourcing up to 15mA, providing very good capacitive drive characteristics. The 74F623 is a non-inverting version of th

Octal bus transceiver, inverting 3tate

DESCRIPTION The 74F620 is an octal transceiver featuring inverting 3-State bus-compatible outputs in both send and receive directions. The outputs are capable of sinking 64mA and sourcing up to 15mA, providing very good capacitive drive characteristics. The 74F623 is a non-inverting version of th

DUAL JK FLIP - FLOP

[Signetics]

DUAL JK FLIP - FLOP

[Signetics]

Octal latched bidirectional Futurebus transceivers 3-State open-collector

DESCRIPTION The 74F8960 and 74F8961 are octal bidirectional latched transceivers and are intended to provide the electrical interface to a high performance wired–OR bus. The B port inverting drivers are low–capacitance open collector with controlled ramp and are designed to sink 100mA from 2 volt

5-Bit Shift Register Product Specfication

[Signetics] DESCRIPTION The 96 is a 5-bit shift register with both serial and parallel (ones transfer) data entry.

Quad 2-input NAND gate

FEATURE • Industrial temperature range available (–40°C to +85°C)

Quad 2-input NAND gate

• Industrial temperature range available (–40°C to +85°C) TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F00 3.4ns 4.4mA

Quad 2-input NAND gate

FEATURE • Industrial temperature range available (–40°C to +85°C)

Quad 2-input NAND gate

• Industrial temperature range available (–40°C to +85°C) TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 74F00 3.4ns 4.4mA

Quad 2-input NOR gate

FEATURE • Industrial temperature range available (–40°C to +85°C)

Quad 2-input NOR gate

FEATURE • Industrial temperature range available (–40°C to +85°C)

Hex inverter

FEATURE • Industrial temperature range available (–40°C to +85°C)

Hex inverter

FEATURE • Industrial temperature range available (–40°C to +85°C) TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT ( TOTAL) 74F04 3.5ns 6.9mA

Hex inverter

FEATURE • Industrial temperature range available (–40°C to +85°C)

Hex inverter

FEATURE • Industrial temperature range available (–40°C to +85°C) TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT ( TOTAL) 74F04 3.5ns 6.9mA

Inverter/buffer drivers

FEATURES OF 74F06, 74F07 • Open Collector output drive 64mA • High speed • 12V output termination voltage • Symmetrical propagation delays FEATURES OF 74F06A, 74F07A • Open Collector output drive 48mA • High speed • 30V output termination voltage • Replaces 74F06 and 74F07 • Improved per

Inverter/buffer drivers

FEATURES OF 74F06, 74F07 • Open Collector output drive 64mA • High speed • 12V output termination voltage • Symmetrical propagation delays FEATURES OF 74F06A, 74F07A • Open Collector output drive 48mA • High speed • 30V output termination voltage • Replaces 74F06 and 74F07 • Improved per

Hex inverter/buffer drivers (open-collector)

FEATURES • Open Collector output drive 64mA • High speed • 12V output termination voltage

Inverter/buffer drivers

FEATURES OF 74F06, 74F07 • Open Collector output drive 64mA • High speed • 12V output termination voltage • Symmetrical propagation delays FEATURES OF 74F06A, 74F07A • Open Collector output drive 48mA • High speed • 30V output termination voltage • Replaces 74F06 and 74F07 • Improved per

Hex inverter/buffer drivers (open-collector)

FEATURES • Open Collector output drive 64mA • High speed • 12V output termination voltage

Inverter/buffer drivers

FEATURES OF 74F06, 74F07 • Open Collector output drive 64mA • High speed • 12V output termination voltage • Symmetrical propagation delays FEATURES OF 74F06A, 74F07A • Open Collector output drive 48mA • High speed • 30V output termination voltage • Replaces 74F06 and 74F07 • Improved per

Inverter/buffer drivers

FEATURES OF 74F06, 74F07 • Open Collector output drive 64mA • High speed • 12V output termination voltage • Symmetrical propagation delays FEATURES OF 74F06A, 74F07A • Open Collector output drive 48mA • High speed • 30V output termination voltage • Replaces 74F06 and 74F07 • Improved per

Inverter/buffer drivers

FEATURES OF 74F06, 74F07 • Open Collector output drive 64mA • High speed • 12V output termination voltage • Symmetrical propagation delays FEATURES OF 74F06A, 74F07A • Open Collector output drive 48mA • High speed • 30V output termination voltage • Replaces 74F06 and 74F07 • Improved per

Hex inverter/buffer drivers (open-collector)

FEATURES • Open Collector output drive 64mA • High speed • 12V output termination voltage

Inverter/buffer drivers

FEATURES OF 74F06, 74F07 • Open Collector output drive 64mA • High speed • 12V output termination voltage • Symmetrical propagation delays FEATURES OF 74F06A, 74F07A • Open Collector output drive 48mA • High speed • 30V output termination voltage • Replaces 74F06 and 74F07 • Improved per

Hex inverter/buffer drivers (open-collector)

FEATURES • Open Collector output drive 64mA • High speed • 12V output termination voltage

Quad two-input AND gate

Quad 2-input AND gate • 74F08 Available for industrial range (–40°C to +85°C)

Quad two-input AND gate

Quad 2-input AND gate • 74F08 Available for industrial range (–40°C to +85°C)

Positive J-K positive edge-triggered flip-flops

DESCRIPTION The 74F109 is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock (CP) input. The J and K are

Positive J-K positive edge-triggered flip-flops

DESCRIPTION The 74F109 is a dual positive edge-triggered JK-type flip-flop featuring individual J, K, clock, set, and reset inputs; also true and complementary outputs. Set (SD) and reset (RD) are asynchronous active low inputs and operate independently of the clock (CP) input. The J and K are

Triple 3-input NAND gate

74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate

Triple 3-input NAND gate

74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate

Dual J-K negative edge-triggered flip-flop

DESCRIPTION The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level

Dual J-K negative edge-triggered flip-flop

DESCRIPTION The 74F112, Dual Negative Edge-Triggered JK-Type Flip-Flop, feature individual J, K, Clock (CPn), Set (SD) and Reset (RD) inputs, true (Qn) and complementary (Qn) outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table, regardless of the level

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Dual J-K negative edge-triggered flip-flops without reset

DESCRIPTION The 74F113, dual negative edge-triggered JK-type flip-flop, features individual J, K, clock (CP), set (SD) inputs, true and complementary outputs. The asynchronous SD input, when low, forces the outputs to the steady state levels as shown in the function table regardless of the level

Dual J-K negative edge-triggered flip-flop with common clock and reset

DESCRIPTION The 74F114, Dual Negative edge-triggered JK-Type Flip-Flop with common clock and reset inputs, features individual J, K, Clock (CP), Set (SD) and Reset (RD) inputs, true and complementary outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table

Dual J-K negative edge-triggered flip-flop with common clock and reset

DESCRIPTION The 74F114, Dual Negative edge-triggered JK-Type Flip-Flop with common clock and reset inputs, features individual J, K, Clock (CP), Set (SD) and Reset (RD) inputs, true and complementary outputs. The SD and RD inputs, when Low, set or reset the outputs as shown in the Function Table

Triple 3-input NAND gate

74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate

Triple 3-input NAND gate

74F10 Triple 3-input NAND gate 74F11 Triple 3-input AND gate

Octal inverter buffer 3-State

DESCRIPTION The 74F1240 and 74F1241 are octal buffers that are ideal for driving bus lines or buffer memory address registers. The outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features two Output Enables, OEa and OEb

Octal inverter buffer 3-State

DESCRIPTION The 74F1240 and 74F1241 are octal buffers that are ideal for driving bus lines or buffer memory address registers. The outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features two Output Enables, OEa and OEb

Octal buffer 3-State

DESCRIPTION The 74F1244 is an octal buffer that is ideal for driving bus lines or buffer memory address registers. FEATURES • High impedance NPN base inputs for reduced loading (20µA in High and Low states) • Low power, light loading • Functional pin-for-pin equivalent of 74F244 • 1/30t

Octal buffer 3-State

DESCRIPTION The 74F1244 is an octal buffer that is ideal for driving bus lines or buffer memory address registers. FEATURES • High impedance NPN base inputs for reduced loading (20µA in High and Low states) • Low power, light loading • Functional pin-for-pin equivalent of 74F244 • 1/30t

Octal transceiver 3-State

DESCRIPTION The 74F1245 is an octal transceiver featuring non-inverting 3-State bus compatible outputs in both transmit and receive directions. The B port outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features an Outp

Octal transceiver 3-State

DESCRIPTION The 74F1245 is an octal transceiver featuring non-inverting 3-State bus compatible outputs in both transmit and receive directions. The B port outputs are capable of sinking 64mA and sourcing up to 15mA, producing very good capacitive drive characteristics. The device features an Outp

Quad buffers 3-State

FEATURE • High impedance NPN base inputs for reduced loading (20µA in High and Low states)

Quad buffers 3-State

FEATURE • High impedance NPN base inputs for reduced loading (20µA in High and Low states)

Quad buffers 3-State

FEATURE • High impedance NPN base inputs for reduced loading (20µA in High and Low states)

Quad buffers 3-State

FEATURE • High impedance NPN base inputs for reduced loading (20µA in High and Low states)

Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have greater noise margin th

Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have greater noise margin

Quad 2-input NAND Schmitt trigger

DESCRIPTION The 74F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have greater noise margin th

Quad 2-Input NAND Gate

QUAD 2-INPUT NAND GATE

3/4 DIAMETER WIRE-WOUND, MULTI-TURN

Quad 2-Input NAND Gate

Quad 2-Input NAND Gate

QUAD 2-INPUT NAND GATE

QUAD 2-INPUT NAND GATE

Quad 2-Input NAND Gates

Quad 2-Input NAND Gates

Quad 2-Input NAND Gates

TTL HD74/HD74S Series

Single Supply Quad Comparators

TRANSISTOR TRANSISTOR LOGIC

Quadruple 2input positive-nand gates

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

QUADRUPLE 2-INPUT POSITIVE-NAND GATES