位置:MPC2106SG66 > MPC2106SG66详情

MPC2106SG66中文资料

厂家型号

MPC2106SG66

文件大小

228.15Kbytes

页面数量

24

功能描述

256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms

数据手册

下载地址一下载地址二到原厂下载

生产厂商

MOTOROLA

MPC2106SG66数据手册规格书PDF详情

The MPC2104/5/6/7 are designed to provide burstable, high performance L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. These products utilize synchronous or asynchronous data RAMs.

• PowerPC–style Burst Counter on Chip (MPC2104/5/6)

• Flow–Through Data I/O (MPC2104/5/6)

• Plug and Pin Compatibility of entire Module Family

• Multiple Clock Pins for Reduced Loading

• All Cache Data and Tag I/Os are LVTTL (3.3 V) Compatible (MPC2104/5/6)

• Three State Outputs

• Byte Write Capability

• Fast Module Clock Rates: Up to 66 MHz

• Fast SRAM Access Times: 10 ns for Tag RAM Match 9 ns for Data RAM (MPC2104/5/6) 15 ns for Data RAM (MPC2107)

• Decoupling Capacitors for Each Fast Static RAM

• High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes

• 182 Pin Card Edge Module

• Burndy Connector, Part Number: ELF182JSC–3Z50

更新时间:2025-10-11 15:01:00
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