Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

High–Performance Silicon–Gate CMOS

TheMC54/74HC132A is identical in pinout to the LS132. The device inputsare compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

TheHC132A can be used to enhance noise immunity or to square up slowly changing waveforms.

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard No. 7A

• Chip Complexity: 72 FETs or 18 Equivalent Gates