High–Performance Silicon–Gate CMOS

The MC74HCT74A is identical in pinout to the LS74. This device may be usedas a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. This device consists of two D flip–flops with individual Set, Reset, and Clock inputs. Information at a D–input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q

outputs are available from each flip–flop. The Set and Reset inputs are asynchronous.

• Output Drive Capability: 10 LSTTL Loads

• TTL NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

• In Compliance with the Requirements Defined by JEDEC Standard No. 7A

• Chip Complexity: 136 FETs or 34 Equivalent Gates