Dual Modulus Prescaler

  

These devices are two–modulus prescalers which will divide by 5 and 6, 8 and 9, and 10 and 11, respectively. A MECL–to–MTTL translator is provided to interface directly with the MC12014 Counter Control Logic. In addition, there is a buffered clock input and MECL bias voltage source.

•MC12009 480 MHz (
5/6), MC12011 550 MHz (
8/9), MC12013 550 MHz (
10/11)

•MECL to MTTL Translator on Chip

•MECL and MTTL Enable Inputs

•5.0 or –5.2 V Operation*

•Buffered Clock Input — Series Input RC Typ, 20 Ohms and 4 pF

•VBBReference Voltage

•310 Milliwatts (Typ)