56F807 16-bit Hybrid Processor

• Up to 40 MIPS at 80MHz core frequency

• DSP and MCU functionality in a unified,

C-efficient architecture

• Hardware DO and REP loops

• MCU-friendly instruction set supports both

DSP and controller functions: MAC, bit

manipulation unit, 14 addressing modes

• 60K × 16-bit words Program Flash

• 2K × 16-bit words Program RAM

• 8K × 16-bit words Data Flash

• 4K × 16-bit words Data RAM

• 2K × 16-bit words Boot Flash

• Up to 64K × 16- bit words each of external

Program and Data memory

• Two 6 channel PWM Modules

• Four 4 channel, 12-bit ADCs

• Two Quadrature Decoders

• CAN 2.0 B Module

• Two Serial Communication Interfaces (SCIs)

• Serial Peripheral Interface (SPI)

• Up to four General Purpose Quad Timers

• JTAG/OnCETM port for debugging

• 14 Dedicated and 18 Shared GPIO lines

• 160-pin LQFP or 160 MAPBGA Packages