位置:MH64S72VJG-5 > MH64S72VJG-5详情

MH64S72VJG-5中文资料

厂家型号

MH64S72VJG-5

文件大小

958.67Kbytes

页面数量

57

功能描述

4,831,838,208-BIT ( 67,108,864-WORD BY 72-BIT ) Synchronous DYNAMIC RAM

数据手册

下载地址一下载地址二到原厂下载

生产厂商

MITSUBISHI

MH64S72VJG-5数据手册规格书PDF详情

DESCRIPTION

The MH64S72VJG is 67108864 - word x 72-bit Sy nchronous DRAM module. This consist of eighteen industry standard 64M x 4 Sy nchronous DRAMs in TSOP.

The TSOP on a card edge dual in-line package prov ides any application where high densities and large of quantities memory are required.

This is a socket-ty pe memory module ,suitable f or easy interchange or addition of module.

FEATURES

• Utilizes industry standard 64M X 4 Synchronous DRAMs in TSOP package , industrystandard Resistered buffer in TSSOP package,industry standard PLL in TSSOP package

• Single 3.3V +/- 0.3V supply

• Max.Clock frequency 133MHz forFully synchronous operation

• referenced to clock rising edge

• 4-bank operation controlled byBA0,BA1(Bank Address)

• /CAS latency-2/3(programmable,at buffer mode)

• LVTTL Interface

• Burst length 1/2/4/8/Full Page(programmable)

• Burst type- Sequential and interleave burst (programmable)

• Random column access

• Burst W rite / Single W rite(programmable)

• Auto precharge / All bank precharge controlled by A10

• Auto refresh and Self refresh

• 8192 refresh cycles every 64ms

APPLICATION

Main memoryor graphic memoryin computer systems

更新时间:2025-5-26 11:46:00
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