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MH16D72AKLB-10中文资料
MH16D72AKLB-10数据手册规格书PDF详情
DESCRIPTION
The MH16D72AKLB is 16777216 - word x 72-bit Double Data Rate(DDR) Sy nchronous DRAM mounted module.
This consists of 9 industry standard 16M x 8 DDR Sy nchronous DRAMs in TSOP with SSTL_2 interf ace which achiev es v ery high speed data rate up to 133MHz.
This socket-ty pe memory module is suitable f or main memory in computer systems and easy to interchange or add modules.
FEATURES
- Utilizes industry standard 16M X 8 DDR Synchronous DRAMs in TSOP package , industry standard Registered Buffer in TSSOP package , and industry standard PLL in TSSOP package.
- Vdd=Vddq=2.5v ±0.2V
- Double data rate architecture; two data transf ers per clock cycle
- Bidirectional, data strobe (DQS) is transmitted/receiv ed with data
- Dif f erential clock inputs (CK0 and /CK0)
- data and data mask ref erenced to both edges of DQS
- /CAS latency - 2.0/2.5 (programmable)
- Burst length- 2/4/8 (programmable)
- Auto precharge / All bank precharge controlled by A10
- 4096 ref resh cycles /64ms
- Auto ref resh and Self ref resh
- Row address A0-11 / Column address A0-9
- SSTL_2 Interf ace
- Module 1bank Conf igration
- Burst Ty pe - sequential/interleav e(programmable)
- Commands entered on each positiv e CLK edge
APPLICATION
Main memoryunit for PC, PCserver
MH16D72AKLB-10产品属性
- 类型
描述
- 型号
MH16D72AKLB-10
- 制造商
MITSUBISHI
- 制造商全称
Mitsubishi Electric Semiconductor
- 功能描述
1,207.959,552-BIT(16,777,216-WORD BY 72-BIT) Double Data Rate Synchronous DRAM Module
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
MITSUBISHI |
23+ |
NA |
25060 |
只做进口原装,终端工厂免费送样 |
|||
M-TRON |
新 |
11 |
全新原装 货期两周 |
||||
M-TRON |
0102- |
20 |
公司优势库存 热卖中! |
||||
N/A |
23+ |
NA |
20000 |
全新原装假一赔十 |
|||
MITSUB |
23+ |
13000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
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Datasheet数据表PDF页码索引
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