位置:M2V64S40DTP-7L > M2V64S40DTP-7L详情
M2V64S40DTP-7L中文资料
M2V64S40DTP-7L数据手册规格书PDF详情
DESCRIPTION
M2V64S20DTP is a 4-bank x 4,194,304-word x 4-bit, M2V64S30DTP is a 4-bank x 2,097,152-word x 8-bit, M2V64S40DTP is a 4-bank x 1,048,576-word x 16-bit, synchronous DRAM, with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. M2V64S20DTP, M2V64S30DTP and M2V64S40DTP achieve very high speed data rate up to 133MHz for -6, and are suitable for main memory or graphic memory in computer systems.
FEATURES
- Single 3.3v±0.3V power supply
- Max. Clock frequency -6:133MHz, -7:100MHz, -8:100MHz
- Fully Synchronous operation referenced to clock rising edge
- 4 bank operation controlled by BA0 & BA1 (Bank Address)
- /CAS latency- 2 and 3 (programmable)
- Burst length- 1, 2, 4, 8 and full page (programmable)
- Burst type- sequential and interleave (programmable)
- Byte Control- DQML and DQMU for M2V64S40DTP
- Random column access
- Auto precharge and All bank precharge controlled by A10
- Auto refresh and Self refresh
- 4096 refresh cycles every 64ms
- LVTTL Interface
- 400-mil, 54-pin Thin Small Outline Package (TSOP II) with 0.8mm lead pitch
M2V64S40DTP-7L产品属性
- 类型
描述
- 型号
M2V64S40DTP-7L
- 制造商
MITSUBISHI
- 制造商全称
Mitsubishi Electric Semiconductor
- 功能描述
64M Synchronous DRAM
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
MITSUBISHI |
05+ |
原厂原装 |
4222 |
只做全新原装真实现货供应 |
|||
MIST |
24+ |
TSSOP |
7890 |
原装现货假一罚十 |
|||
MIST |
24+ |
TSSOP |
5632 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
|||
MIT |
2015+ |
SOP/DIP |
19889 |
一级代理原装现货,特价热卖! |
|||
MIT |
01+ |
TSOP/54 |
100 |
原装现货海量库存欢迎咨询 |
|||
MIT |
TSOP54 |
68500 |
一级代理 原装正品假一罚十价格优势长期供货 |
||||
MIST |
2025+ |
TSSOP |
3565 |
全新原厂原装产品、公司现货销售 |
|||
MIT |
2402+ |
TSOP54 |
8324 |
原装正品!实单价优! |
|||
MIST |
07+ |
TSSOP |
333 |
原装现货 |
|||
MIST |
24+ |
TSSOP |
1200 |
M2V64S40DTP-7L 资料下载更多...
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MITSUBISHI相关芯片制造商
Datasheet数据表PDF页码索引
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