Features

• 3 to 1 Input Multiplexer: Two Inputs Accept Any

Differential (LVPECL, HCSL, LVDS, SSTL, CML,

LVCMOS) or a Single-Ended Signal and the Third

Input Accepts a Crystal or a Single-Ended Signal

• Eight Differential HCSL/LVDS/LVPECL Outputs

• Ultra-Low Additive Jitter: 24 fs (Integration Band:

12 kHz to 20 MHz at 625 MHz Clock Frequency)

• Supports Clock Frequencies from 0 to 1.5 GHz

• Supports 2.5V or 3.3V Power Supplies on HCSL/

LVDS/LVPECL Outputs

• Embedded Low Drop Out (LDO) Voltage

Regulator Provides Superior Power Supply Noise

Rejection

• Maximum Output to Output Skew of 50 ps

• Device Controlled Via I2C or Hardware Control

Pins

• Factory Configurable Default Settings via OTP

• Transparent for Spread Spectrum Clock

Applications

• PCIe Gen1/2/3/4/5 Clock Distribution

• Wired Communications: OTN, SONET/SDH, GE,

10 GE, FC and 10G FC

• General Purpose Clock Distribution

• Low-Jitter Clock Trees

• Logic Translation

• Clock and Data Signal Restoration

• Wireless Communications

• High Performance Microprocessor Clock

Distribution

• Test Equipment