DESCRIPTION

The SY100S350 offers six high-speed D-Latches with both true and complement outputs, and is performance compatible for use with high-performance ECL systems.

FEATURES

■ Max. transparent propagation delay of 900ps

■ Min. Master Reset and Enable pulse widths of 100ps

■ IEE min. of –98mA

■ Industry standard 100K ECL levels

■ Extended supply voltage option: VEE = –4.2V to –5.5V

■ Voltage and temperature compensation for improved noise immunity

■ Internal 75KΩ input pull-down resistors

■ More than 40 faster than Fairchild

■ Approximately 30 lower power than Fairchild

■ Function and pinout compatible with Fairchild F100K

■ Available in 24-pin CERPACK and 28-pin PLCC packages