FEATURES

 1:9 LVCMOS output fanout buffer for DC to 150MHz

 8mA Output Drive Strength

 Low power consumption for portable applications

 Low input-output delay

 Output-Output skew less than 250ps

 Low Additive Phase Jitter of 60fs RMS

 2.5V to 3.3V, ±10% operation

 1.8V ± 10% operation up to 67MHz

 Operating temperature range from -40°C to 85°C

 Available in 16-Pin QFN GREEN/RoHS package

DESCRIPTION

The PL133-97 is an advanced fanout buffer design for

high performance, low-power, small form factor applications.

The PL133-97 accepts a reference clock input from

DC to 150MHz and provides 6 outputs of the same frequency.

The PL133-97 is offered in a QFN-16L 3x3mm package

and it offers the best phase noise, additive jitter performance,

and lowest power consumption of any comparable

IC.

The PL133-97 outputs can be disabled to a high impedance

(tri-state) by pulling low the OE pin. When the OE pin

is high, the outputs are enabled and follow the REF input

signal. When the OE pin is left open, a pull-up resistor on

the chip will default the OE pin to logic 1 so the outputs are

enabled.

CLK8 is a free running output that remains enabled

when the OE pin is pulled low.