General Description

The MIC68220 is a dual high peak current LDO regulator designed specifically for powering applications such as FPGA core voltages that require high start up current with lower nominal operating current. Capable of sourcing 2A of current per channel for start-up, the MIC68220 provides high power from a small MLF™ leadless package. The MIC68220 can also implement a variety of power-up and power-down protocols such as sequencing, tracking, and ratiometric tracking.

Features

• Stable with 4.7uF ceramic output capacitor

• Input voltage range: 1.65V to 5.5V

• 0.5V reference

• +1.0 initial output tolerance

• 2A maximum output current – peak start up

• 1A Continuous Operating Current

• Tracking on turn-on and turn-off with pin strapping

• Timing Controlled Sequencing On/Off

• Programmable Ramp Control™ for in-rush current limiting and slew rate control of the output voltage on Turn-On

• Power-on Reset (POR) supervisor with programmable delay time

• Single Master can control multiple Slave regulators with tracking output voltages

• Tiny 4mm x 5mm MLF® package

• Maximum dropout (VIN – VOUT) of 400mV over temperature at 1A output current

• Adjustable Output Voltages

• Excellent line and load regulation specifications

• Logic controlled shutdown

• Thermal shutdown and current limit protection

Applications

• FPGA/PLD Power Supply

• Networking/Telecom Equipment

• Microprocessor Core Voltage

• High Efficiency Linear Post Regulator

• Sequenced or Tracked Power Supply