Dual Bias Resistor Transistor PNP Silicon

Dual Bias Resistor Transistor PNP Silicon P/b Lead(Pb)-Free

Dual Bias Resistor Transistor

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Dual Bias Resistor Transistors

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BIAS RESISTOR TRANSISTORS

Dual Bias Resistor Transistors

Dual Bias Resistor Transistors PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These

Dual Bias Resistor Transistors

Dual Bias Resistor Transistors PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. These

Dual Bias Resistor Transistors

Dual Bias Resistor Transistors PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These d

Dual Bias Resistor Transistors

Dual PNP Bias Resistor Transistors R1 = 10 kΩ, R2 = 10 kΩ PNP Transistors with Monolithic Bias Resistor Network This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a

Dual PNP Bias Resistor Transistors

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Digital Transistors

TRANS 2PNP PREBIAS 0.25W SOT363

Dual Bias Resistor Transistors

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Dual PNP Bias Resistor Transistors R1 = 4.7 kOhm, R2 =  kOhm

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Dual Bias Resistor Transistors

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CMOS 16K (2K x 8) Static RAM

DESCRIPTION The LH5116/H are static RAMs organized as 2,048 × 8 bits. It is fabricated using silicon-gate CMOS process technology. It features high speed access in read mode using output enable (tOE). FEATURES • 2,048 × 8 bit organization • Access time: 100 ns (MAX.) • Power consumption:

CMOS 16K (2K x 8) Static RAM

DESCRIPTION The LH5116/H are static RAMs organized as 2,048 × 8 bits. It is fabricated using silicon-gate CMOS process technology. It features high speed access in read mode using output enable (tOE). FEATURES • 2,048 × 8 bit organization • Access time: 100 ns (MAX.) • Power consumption:

CMOS 16K (2K x 8) Static RAM

DESCRIPTION The LH5116S is a static RAM organized as 2,048 × 8 bits. It is fabricated using silicon-gate CMOS process technology. It operates at a low supply voltage of 3 V ±10. FEATURES • 2,048 × 8 bit organization • Access time: 1000 ns (MAX.) • Low-power consumption: Operating: 33 mW (

5 CHANNELS VIDEO SWITCH

5 CHANNELS VIDEO SWITCH ■ EACH CHANNEL EXCEPT FAST BLANKING HAS 6dB GAIN ■ R, G, B AND VIDEO SIGNALS ARE CLAMPED TO THESAME REFERENCE VOLTAGEIN ORDER TO HAVE NO OUTPUT DIFFERENTIAL VOLTAGE WHEN SWITCHING ■ ALL INPUT LEVELS COMPATIBLE WITH NFC 92250 AND EN 50049 NORMS ■ 30MHz BAND WIDTH FOR R,

Silicon PNP epitaxial planer transistor

Silicon PNP epitaxial planar type For digital circuits ■ Features • Costs can be reduced through downsizing of the equipment and reduction of the number of parts • S-Mini type package, allowing automatic insertion through the tape/ magazine packing