T1/E1/OC3 System Synchronizer

Description The MT9044 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/0C3 links. Features • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratu

0.3-7.0V; T1/E1/OC3 system synchronizer. For synchronization and timing control for multitrunk T1, E1 and STS-3/OC3 systems, ST-BUS clock and frame pulse sources

封装/外壳：44-LCC（J 形引线） 功能：数字锁相环 包装：卷带（TR） 描述：IC TELECOM INTERFACE 44PLCC 集成电路（IC） 电信

封装/外壳：44-LCC（J 形引线） 功能：数字锁相环 包装：卷带（TR） 描述：IC TELECOM INTERFACE 44PLCC 集成电路（IC） 电信

T1/E1/OC3 System Synchronizer

Description The MT9044 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/0C3 links. Features • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratu

T1/E1/OC3 System Synchronizer

Description The MT9044 T1/E1/OC3 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links and STS-3/0C3 links. Features • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratu

DOT MATRIX LCD CONTROLLER DRIVER

GENERAL DESCRIPTION The ML9044 used in combination with an 8–bit or 4–bit microcontroller controls the operation of a character type dot matrix LCD. FEATURES • Easy interfacing with 8–bit or 4–bit microcontroller • Switchable between serial and parallel interfaces • Dot–matrix LCD controller/

LM9044 Lambda Sensor Interface Amplifier

文件：125.42 Kbytes Page：6 Pages

LM9044 Lambda Sensor Interface Amplifier

文件：125.42 Kbytes Page：6 Pages