Multiple Output Trunk PLL

Description The MT9041 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals for T1 and E1 primary rate transmission links that are compatible with ST-BUS/GCI frame alignment timing requirements. The PLL outputs can be synchronized to either a 2.048 MHz, 1.

T1/E1 System Synchronizer

The MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9041B generates ST-BUS clock and framing signals that are phase locked to either a 2.048 MHz, 1.544 MHz • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 Interfaces\n• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 Interfaces\n• Selectable 1.544 MHz, 2.048 MHz or 8 kHz input reference signals\n• Provides C1.5, C2, C3, C4, C8 and C16 ou;

Multiple Output Trunk PLL

Description The MT9041 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals for T1 and E1 primary rate transmission links that are compatible with ST-BUS/GCI frame alignment timing requirements. The PLL outputs can be synchronized to either a 2.048 MHz, 1.

T1/E1 System Synchronizer

Description The MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9041B generates ST-BUS clock and framing signals that are phase locked to either a

T1/E1 System Synchronizer

Description The MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9041B generates ST-BUS clock and framing signals that are phase locked to either a

T1/E1 System Synchronizer

Description\nThe MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links.\nThe MT9041B generates ST-BUS clock and framing signals that are phase locked to either a 2.048M • Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 Interfaces\n• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 Interfaces\n• Selectable 1.544MHz, 2.048MHz or 8kHz input reference signals\n• Provides C1.5, C2, C3, C4, C8 and C16 outpu;

T1/E1 System Synchronizer

封装/外壳：28-LCC（J 形引线） 功能：数字锁相环 包装：托盘 描述：IC TELECOM INTERFACE 28PLCC 集成电路（IC） 电信

封装/外壳：28-LCC（J 形引线） 功能：数字锁相环 包装：卷带（TR） 描述：IC TELECOM INTERFACE 28PLCC 集成电路（IC） 电信

Micropower, Single-Supply, UCSP/SOT23 Comparator Precision Reference ICs

General Description The MAX9038–MAX9043 and MAX9050–MAX9053 feature combinations of low-power comparators and precision voltage references. Their operating voltage range makes them ideal for both 3V and 5V systems. Features ● Comparator + Precision Reference in UCSP/SOT23 ● 2.5V to 5.5V Single