T1/CEPT Digital Trunk PLL

Description The MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT trans

ISO-CMOS ST-BUS??FAMILY T1/CEPT Digital Trunk PLL

Description The MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT trans

5V LOW DROPOUT REGULATOR

DESCRIPTION The LX8940 is a 5V, low dropout, low quiescent current regulator rated for 1A of output current. It can regulate with as low as 0.4V headroom between the input and output voltages, thus minimizing power dissipation. In addition, it can be used in applications where worst case supplies

0.800-INCH SEVEN SEGMENT DISPLAYS

HIGH EFFICIENCY RED MAN8900 SERIES

0.800-INCH SEVEN SEGMENT DISPLAYS

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