Synchronous DRAMs

SDR SDRAM MT48LC128M4A2 ??32 Meg x 4 x 4 banks MT48LC64M8A2 ??16 Meg x 8 x 4 banks MT48LC32M16A2 ??8 Meg x 16 x 4 banks

General Description The 512Mb SDRAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits. It is internally configured as a quad-bank DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Each of the x4’s 134,217,728