封装/外壳：84-TFBGA 包装：散装 描述：IC DRAM 1GBIT PARALLEL 84FBGA 集成电路（IC） 存储器

DDR2 1G X16 FBGA

DDR2 SDRAM

DDR2 SDRAM MT47H256M4 – 32 Meg x 4 x 8 banks MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Features • VDD = 1.8V ±0.1V, VDDQ = 1.8V ±0.1V • JEDEC-standard 1.8V I/O (SSTL_18-compatible) • Differential data strobe (DQS, DQS#) option • 4n-bit prefetch architecture • Dup

DDR2 SDRAM

DDR2 SDRAM MT47H256M4 – 32 Meg x 4 x 8 banks MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Features • VDD = 1.8V ±0.1V, VDDQ = 1.8V ±0.1V • JEDEC-standard 1.8V I/O (SSTL_18-compatible) • Differential data strobe (DQS, DQS#) option • 4n-bit prefetch architecture • Dup

DDR2 SDRAM

DDR2 SDRAM MT47H256M4 – 32 Meg x 4 x 8 banks MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Features • VDD = 1.8V ±0.1V, VDDQ = 1.8V ±0.1V • JEDEC-standard 1.8V I/O (SSTL_18-compatible) • Differential data strobe (DQS, DQS#) option • 4n-bit prefetch architecture • Dup

DDR2 SDRAM

DDR2 SDRAM MT47H256M4 – 32 Meg x 4 x 8 banks MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Features • VDD = 1.8V ±0.1V, VDDQ = 1.8V ±0.1V • JEDEC-standard 1.8V I/O (SSTL_18-compatible) • Differential data strobe (DQS, DQS#) option • 4n-bit prefetch architecture • Dup

DDR2 SDRAM

DDR2 SDRAM MT47H256M4 – 32 Meg x 4 x 8 banks MT47H128M8 – 16 Meg x 8 x 8 banks MT47H64M16 – 8 Meg x 16 x 8 banks Features • VDD = 1.8V ±0.1V, VDDQ = 1.8V ±0.1V • JEDEC-standard 1.8V I/O (SSTL_18-compatible) • Differential data strobe (DQS, DQS#) option • 4n-bit prefetch architecture • Dup