Dual J-K Flip-Flops with Preset and Clear

文件：136.2 Kbytes Page：6 Pages

Dual J-K Flip-Flops with Preset and Clear

Dual J-K Flip-Flops with Preset and Clear

文件：136.2 Kbytes Page：6 Pages

Dual J-K Flip-Flops with Preset and Clear

文件：136.2 Kbytes Page：6 Pages

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M74HC76 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 67MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETRICAL OUTPUT

Dual J-K Flip-Flops (with Preset and Clear)

Description Each flip-flop has independent J, K, preset, clear, and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low lo

Dual J-K Flip-Flops (with Preset and Clear)

Description Each flip-flop has independent J, K, preset, clear, and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low lo

Dual J-K Flip-Flops (with Preset and Clear)

Description Each flip-flop has independent J, K, preset, clear, and clock inputs and Q and Q outputs. This device is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear and preset are independent of the clock and accomplished by a low lo

DUAL J-K FLIP-FLOP WITH SET AND RESET & CLEAR

文件：274.01 Kbytes Page：6 Pages