Dual J-K Flip-Flops with Preset and Clear

General Description\nThese high speed (30 MHz minimum) J-K Flip-Flops utilize advanced silicon-gate CMOS technology to achieve, the low power consumption and high noise immunity of standard CMOS integrated circuits, along with the ability to drive 10 LS-TTL loads. ■ Typical propagation delay: 16 ns\n■ Wide operating voltage range\n■ Low input current: 1 mA maximum\n■ Low quiescent current: 40 mA maximum (74HC Series)\n■ High output drive: 10 LS-TTL loads ;

Dual J-K Flip-Flops with Preset and Clear

文件：136.2 Kbytes Page：6 Pages

Dual J-K Flip-Flops with Preset and Clear

文件：136.2 Kbytes Page：6 Pages

Dual J-K Flip-Flops with Preset and Clear

文件：136.2 Kbytes Page：6 Pages

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M74HC76 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 67MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETRICAL OUTPUT

DUAL J-K FLIP FLOP WITH PRESET AND CLEAR

DESCRIPTION The M74HC76 is an high speed CMOS DUAL J-K FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. ■ HIGH SPEED : fMAX = 67MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 VCC (MIN.) ■ SYMMETRICAL OUTPUT

Dual JK Flip-Flop With Set and Reset

Dual JK Flip-Flop With Set and Reset High–Performance Silicon–Gate CMOS The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip–flop is negative–edge clocked and has ac

Dual JK Flip-Flop With Set and Reset

Dual JK Flip-Flop With Set and Reset High–Performance Silicon–Gate CMOS The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip–flop is negative–edge clocked and has ac

Dual JK Flip-Flop With Set and Reset

Dual JK Flip-Flop With Set and Reset High–Performance Silicon–Gate CMOS The MC74HC76 is identical in pinout to the LS76. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip–flop is negative–edge clocked and has ac