Dual Non-Retriggerable Monostable Multivibrator

The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits.

Dual Non-Retriggerable Monostable Multivibrator

Dual Non-Retriggerable Monostable Multivibrator

The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits.

Dual Non-Retriggerable Monostable Multivibrator

The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits.

Dual Non-Retriggerable Monostable Multivibrator

The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits.

Dual Non-Retriggerable Monostable Multivibrator

The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits.

Dual Non-Retriggerable Monostable Multivibrator

The MM74HC221A high speed monostable multivibrators (one shots) utilize advanced silicon-gate CMOS technology. They feature speeds comparable to low power Schottky TTL circuitry while retaining the low power and high noise immunity characteristic of CMOS circuits.

Dual Non-Retriggerable Monostable Multivibrator

文件：120.05 Kbytes Page：9 Pages

Dual Non-Retriggerable Monostable Multivibrator

文件：120.05 Kbytes Page：9 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC MULTIVIBRATOR 22NS 16SOIC 集成电路（IC） 多谐振荡器

Dual Non-Retriggerable Monostable Multivibrator

文件：120.05 Kbytes Page：9 Pages

Dual Non-Retriggerable Monostable Multivibrator

文件：120.05 Kbytes Page：9 Pages

封装/外壳：16-DIP（0.300"，7.62mm） 包装：管件 描述：IC MULTIVIBRATOR 22NS 16DIP 集成电路（IC） 多谐振荡器

Dual Non-Retriggerable Monostable Multivibrator

文件：120.05 Kbytes Page：9 Pages

Dual non-retriggerable monostable multivibrator with reset

The 74HC/HCT221 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT221 are dual non-retriggerable monostable multivibrators. Each multivibrator features an active LOW-goin

Dual non-retriggerable monostable multivibrator with reset

The 74HC/HCT221 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT221 are dual non-retriggerable monostable multivibrators. Each multivibrator features an active LOW-goin

Dual non-retriggerable monostable multivibrator with reset

The 74HC/HCT221 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT221 are dual non-retriggerable monostable multivibrators. Each multivibrator features an active LOW-goin

DUAL MONOSTABLE MULTIVIBRATOR

DESCRIPTION The M54/74HC221/221A are high speed CMOS MONOSTABLE multivibrators fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. There are two trigger inputs, AINPUT (negative edge) and

DUAL MONOSTABLE MULTIVIBRATOR

DESCRIPTION The M54/74HC221/221A are high speed CMOS MONOSTABLE multivibrators fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. There are two trigger inputs, AINPUT (negative edge) and