4-to-16 Line Decoder

General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits.

4-to-16 Line Decoder

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4-to-16 Line Decoder

General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits.

4-to-16 Line Decoder

General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits.

4-to-16 Line Decoder

General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high noise immunity, and low power consumption of CMOS with speeds similar to low power Schottky TTL circuits.

封装/外壳：24-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC DECODER 1 X 4:16 24TSSOP 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：24-DIP（0.300"，7.62mm） 包装：管件 描述：IC DECODER 1 X 4:16 24DIP 集成电路（IC） 信号开关，多路复用器，解码器

IC DECODER 4-16 LINE 24-DIP

IC DECODER 4-16 LINE 24SOIC

IC DECODER 4-16 LINE 24-SOIC

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer

4-to-16 line decoder/demultiplexer

Dual 1-of-16 Decoder / Demultiplexer in bare die form

Description The 74HC154 is fabricated using a 2.5μm 5V CMOS process and has the same high speed performance of LSTTL combined with CMOS low power consumption. The device consists of x4 active-high binary address inputs, x16 active-low outputs & x2 active-low chip-selects. The x2 active-low