丝印代码：MK1574-01SI；3.3 VOLT FRAME RATE COMMUNICATIONS PLL

Features • 3.3 volt operation • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • Available in Pb (lead) free package • For jitter attenuation, use the M

丝印代码：MK1574-01SI；3.3 VOLT FRAME RATE COMMUNICATIONS PLL

Features • 3.3 volt operation • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • Available in Pb (lead) free package • For jitter attenuation, use the M

Frame Rate Communications PLL

Description The MK1574-01 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC PLL FRAME RATE COMM 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

丝印代码：MK1574-01SILF；3.3 VOLT FRAME RATE COMMUNICATIONS PLL

Features • 3.3 volt operation • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • Available in Pb (lead) free package • For jitter attenuation, use the M

丝印代码：MK1574-01SILF；3.3 VOLT FRAME RATE COMMUNICATIONS PLL

Features • 3.3 volt operation • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • Available in Pb (lead) free package • For jitter attenuation, use the M

Frame Rate Communications PLL

Description The MK1574-01 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC PLL FRAME RATE COMM 16-SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

Frame Rate Communications PLL

Description The MK1574-01 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to

丝印代码：MK1574-01S；3.3 VOLT FRAME RATE COMMUNICATIONS PLL

Features • 3.3 volt operation • Packaged in 16-pin SOIC • Accepts 8 kHz input clock • Output clock rates include T1, E1, T2, E2 • Available in commercial (0º to + 70ºC) or industrial (-40 to +85ºC) temperature ranges • Available in Pb (lead) free package • For jitter attenuation, use the M

Frame Rate Communications PLL

Description The MK1574-01 is a Phase-Locked Loop (PLL) based clock synthesizer, which accepts an 8 kHz clock input as a reference, and generates many popular communications frequencies. All outputs are frequency locked together and to the input. This allows for the generation of locked clocks to