封装/外壳：28-LCC（J 形引线） 包装：散装 描述：IC DRV CLK PLL LV 100MHZ 28-PLCC 集成电路（IC） 时钟发生器，PLL，频率合成器

LOW SKEW CMOS PLL CLOCK DRIVER

The MC88LV915T Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for high performance PC’s and workstations. The PLL allows the high current, low skew outputs to lock ont

封装/外壳：28-LCC（J 形引线） 包装：卷带（TR） 描述：IC DRIVER CLK PLL 100MHZ 28-PLCC 集成电路（IC） 时钟发生器，PLL，频率合成器

LOW SKEW CMOS PLL CLOCK DRIVER

The MC88LV915T Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for high performance PC’s and workstations. The PLL allows the high current, low skew outputs to lock ont

Low Voltage Low Skew CMOS PLL Clock Driver, 3-State

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