LOW SKEW CMOS CLOCK DRIVER

The MC88913 is a high–speed, low power, hex divide–by–two D–type flip–flop with two inverting and four non–inverting outputs that have closely matched propagation delays. With a TTL compatible buffered clock input that is common to all flip–flops, the MC88913 is ideal for use in high–frequency sys

LOW SKEW CMOS CLOCK DRIVER

LOW SKEW CMOS CLOCK DRIVER

The MC88913 is a high–speed, low power, hex divide–by–two D–type flip–flop with two inverting and four non–inverting outputs that have closely matched propagation delays. With a TTL compatible buffered clock input that is common to all flip–flops, the MC88913 is ideal for use in high–frequency sys

LOW SKEW CMOS CLOCK DRIVER

The MC88913 is a high–speed, low power, hex divide–by–two D–type flip–flop with two inverting and four non–inverting outputs that have closely matched propagation delays. With a TTL compatible buffered clock input that is common to all flip–flops, the MC88913 is ideal for use in high–frequency sys

1.25Gbps HIGH-SPEED LIMITING POST AMPLIFIER

DESCRIPTION The SY88913 limiting post amplifier with its high gain and wide bandwidth is ideal for use as a post amplifier in fiber-optic receivers with data rates up to 1.25Gbps. Signals as small as 5mVp-p can be amplified to drive devices with PECL inputs. The SY88913 generates a chatter-free P

1.25Gbps HIGH-SPEED LIMITING POST AMPLIFIER

DESCRIPTION The SY88913 limiting post amplifier with its high gain and wide bandwidth is ideal for use as a post amplifier in fiber-optic receivers with data rates up to 1.25Gbps. Signals as small as 5mVp-p can be amplified to drive devices with PECL inputs. The SY88913 generates a chatter-free P