8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output High?뭁erformance Silicon?묰ate CMOS

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8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output

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封装/外壳：16-SOIC（0.154"，3.90mm 宽） 功能：并行或串行至串行 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SHIFT REGISTER 8BIT 16-SOIC 集成电路（IC） 移位寄存器

8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output High-Performance Silicon-Gate CMOS

8-Bit Serial or Parallel-Input/Serial-Output Shift Register with 3-State Output High–Performance Silicon–Gate CMOS The MC54/74HC589 is similar in function to the HC597, which is not a 3–state device. The device inputs are compatible with standard CMOS outputs, with pullup resistors, they are com

8-Bit Shift Registers with Input Latches and 3-STATE Serial Output

General Description The MM74HC589 high speed shift register utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. The MM74HC589 comes in a 16-pin packa

8-bit Serial or Parallel-input/Serial-output Shift Register (with 3-state outputs)

Description The HD74HC589 is similar in function to the HD74HC597, which is not a 3-state device. This device consists of an 8-bit storage latch which feeds parallel data to an 8-bit shift register. Data can also be loaded serially (see Function Table). The shift register output, OH, is a three-

8-bit Serial of Parallel-input/Serial-output Shift Register(with 3-state outputs)

Description The HD74HC589 is similar in function to the HD74HC597, which is not a 3-state device. This device consists of an 8-bit storage latch which feeds parallel data to an 8-bit shift register. Data can also be loaded serially (see Function Table). The shift register output, OH, is a three-

8-bit Serial or Parallel-input/Serial-output Shift Register (with 3-state outputs)

Description The HD74HC589 is similar in function to the HD74HC597, which is not a 3-state device. This device consists of an 8-bit storage latch which feeds parallel data to an 8-bit shift register. Data can also be loaded serially (see Function Table). The shift register output, OH, is a three-