Dual 4-Stage Binary Ripple Counter

Dual 4−Stage Binary Ripple Counter High−Performance Silicon−Gate CMOS The MC74HC393A is identical in pinout to the LS393. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two independent 4−bit bina

Dual 4-Stage Binary Ripple Counter

Dual 4−Stage Binary Ripple Counter High−Performance Silicon−Gate CMOS The MC74HC393A is identical in pinout to the LS393. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two independent 4−bit bina

Dual 4?뭆tage Binary Ripple Counter High?뭁erformance Silicon?묰ate CMOS

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封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC COUNTER RPPL DUAL 4ST 14TSSOP 集成电路（IC） 计数器，除法器

Dual 4-Stage Binary Ripple Counter

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封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC COUNTER RPPL DUAL 4ST 14TSSOP 集成电路（IC） 计数器，除法器

Dual 4?뭆tage Binary Ripple Counter High?뭁erformance Silicon?묰ate CMOS

文件：180.77 Kbytes Page：11 Pages

Dual 4-bit binary ripple counter

1. General description The 74HC393; 74HCT393 is a dual 4-stage binary ripple counter. Each counter features a clock input (nCP), an overriding asynchronous master reset input (nMR) and 4 buffered parallel outputs (nQ0 to nQ3). The counter advances on the HIGH-to-LOW transition of nCP. A HIGH on

Dual 4-bit binary ripple counter

Dual 4-bit binary ripple counter

GENERAL DESCRIPTION The 74HC/HCT393 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (

DUAL 4-BIT BINARY RIPPLE COUNTER

High Speed CMOS Logic

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