Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE OUTPUTS

The MC74AC640/74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively

八路 3 态反相总线收发器

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated. • Bidirectional Data Path\n• A and B Outputs Sink 24 mA/Source –24 mA\n• TTL Compatible Inputs\n• Pb-Free Packages are Available;

Octal 3-State Inverting Transciever

文件：77.37 Kbytes Page：6 Pages

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE OUTPUTS

The MC74AC640/74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

OCTAL BIDIRECTIONAL TRANSCEIVER WITH 3-STATE OUTPUTS

The MC74AC640/74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively

Octal 3?뭆tate Inverting Transciever

The MC74ACT640 octal bus transceiver is designed for asynchronous two-way communication between data buses. The device transmits data from bus A to bus B when T/R = HIGH, or from bus B to bus A when T/R = LOW. The enable input can be used to disable the device so the buses are effectively isolated

Octal 3-State Inverting Transciever

文件：77.37 Kbytes Page：6 Pages

Octal 3-State Inverting Transciever

文件：77.37 Kbytes Page：6 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC TXRX INVERT 5.5V 20SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：管件 描述：IC TXRX INVERT 5.5V 20SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Octal 3-State Inverting Transciever

文件：77.37 Kbytes Page：6 Pages

OCTAL 3-STATE INVERTING BUS TRANSCEIVER

OCTAL 3-STATE INVERTING BUS TRANSCEIVER High-Speed Silicon-Gate CMOS The IN74ACT640 is identical in pinout to the LS/ALS640, HC/HCT640. The IN74ACT640 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. The IN74ACT640 is a 3-state transceiver that is u

OCTAL 3-STATE INVERTING BUS TRANSCEIVER

OCTAL 3-STATE INVERTING BUS TRANSCEIVER High-Speed Silicon-Gate CMOS The IN74ACT640 is identical in pinout to the LS/ALS640, HC/HCT640. The IN74ACT640 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. The IN74ACT640 is a 3-state transceiver that is u

OCTAL BUS TRANSCEIVER

DESCRIPTION The TC51WHM516AXBN is a 33,554,432-bit pseudo static random access memory(PSRAM) organized as 2,097,152 words by 16 bits. Using Toshiba’s CMOS technology and advanced circuit techniques, it provides high density, high speed and low power. The device operates single power supply. The

OCTAL BUS TRANSCEIVER

DESCRIPTION The TC51WHM516AXBN is a 33,554,432-bit pseudo static random access memory(PSRAM) organized as 2,097,152 words by 16 bits. Using Toshiba’s CMOS technology and advanced circuit techniques, it provides high density, high speed and low power. The device operates single power supply. The

OCTAL BUS TRANSCEIVER

DESCRIPTION The TC51WHM516AXBN is a 33,554,432-bit pseudo static random access memory(PSRAM) organized as 2,097,152 words by 16 bits. Using Toshiba’s CMOS technology and advanced circuit techniques, it provides high density, high speed and low power. The device operates single power supply. The