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MC74AC377价格
参考价格:¥2.0985
型号:MC74AC377DTR2G 品牌:On Semiconductor 备注:这里有MC74AC377多少钱,2025年最近7天走势,今日出价,今日竞价,MC74AC377批发/采购报价,MC74AC377行情走势销售排行榜,MC74AC377报价。型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
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MC74AC377 | Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | ||
MC74AC377 | OCTAL D FLIP-FLOP WITH CLOCK ENABLE The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | Motorola 摩托罗拉 | ||
MC74AC377 | Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | ||
MC74AC377 | Octal D Flip-Flop with Clock Enable 文件:102.21 Kbytes Page:9 Pages | ONSEMI 安森美半导体 | ||
MC74AC377 | 八路 D 型触发器,带时钟启用 | ONSEMI 安森美半导体 | ||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
OCTAL D FLIP-FLOP WITH CLOCK ENABLE The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | Motorola 摩托罗拉 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
OCTAL D FLIP-FLOP WITH CLOCK ENABLE The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | Motorola 摩托罗拉 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip?묯lop with Clock Enable The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one setup time be | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable 文件:102.21 Kbytes Page:9 Pages | ONSEMI 安森美半导体 | |||
封装/外壳:20-TSSOP(0.173",4.40mm 宽) 功能:标准 包装:卷带(TR)剪切带(CT)Digi-Reel® 得捷定制卷带 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP 集成电路(IC) 触发器 | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable 文件:102.21 Kbytes Page:9 Pages | ONSEMI 安森美半导体 | |||
封装/外壳:20-TSSOP(0.173",4.40mm 宽) 功能:标准 包装:卷带(TR) 描述:IC FF D-TYPE SNGL 8BIT 20TSSOP 集成电路(IC) 触发器 | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable 文件:102.21 Kbytes Page:9 Pages | ONSEMI 安森美半导体 | |||
OCTAL D FLIP-FLOP WITH CLOCK ENABLE | ETC 知名厂家 | ETC | ||
Octal D Flip-Flop with Clock Enable 文件:102.21 Kbytes Page:9 Pages | ONSEMI 安森美半导体 | |||
Octal D Flip-Flop with Clock Enable 文件:102.21 Kbytes Page:9 Pages | ONSEMI 安森美半导体 | |||
Octal D-Type Flip-Flop with Clock Enable General Description The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Octal D-Type Flip-Flop with Clock Enable General Description The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Octal D-Type Flip-Flop with Clock Enable General Description The AC/ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D input, one | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Octal D-Type Flip-Flop with Clock Enable 文件:426.64 Kbytes Page:13 Pages | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 | |||
Octal D-Type Flip-Flop with Clock Enable 文件:426.64 Kbytes Page:13 Pages | FairchildFairchild Semiconductor 仙童半导体飞兆/仙童半导体公司 |
MC74AC377产品属性
- 类型
描述
- 型号
MC74AC377
- 制造商
ONSEMI
- 制造商全称
ON Semiconductor
- 功能描述
OCTAL D FLIP-FLOP WITH CLOCK ENABLE
IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
M0T |
24+ |
NA/ |
331 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
|||
ON/安森美 |
25+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
||||
ONS |
23+ |
NA |
13650 |
原装正品,假一罚百! |
|||
MC74AC377DW |
12 |
12 |
|||||
ON SEMIC |
23+ |
TSSOP20 |
2500 |
正规渠道,只有原装! |
|||
24+ |
3000 |
公司现货 |
|||||
onsemi |
25+ |
原厂封装 |
10280 |
原厂授权代理,专注军工、汽车、医疗、工业、新能源! |
|||
ON(安森美) |
23+ |
标准封装 |
5000 |
原厂原装现货订货价格优势终端BOM表可配单提供样品 |
|||
ON |
1706+ |
? |
7500 |
只做原装进口,假一罚十 |
|||
三年内 |
1983 |
只做原装正品 |
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