Hex Buffers

The MC14049UB hex inverter/buffer is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic−level conversio

W Semiconductor Components Industries, LLC, 2004

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封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：管件 描述：IC INVERTER 6CH 1-INP 16SOEIAJ 集成电路（IC） 门和反相器

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC INVERTER 6CH 1-INP 16SOEIAJ 集成电路（IC） 门和反相器

Hex Buffers

文件：107 Kbytes Page：7 Pages

Hex Buffers

文件：155.8 Kbytes Page：8 Pages

Hex Buffers

文件：106.84 Kbytes Page：7 Pages

Hex Buffer

The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P–Channel and N–Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired. Thes

Hex Buffer

The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P–Channel and N–Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired. Thes

Hex Buffers

The MC14049UB hex inverter/buffer is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic−level conversio

Hex Buffers

The MC14049UB hex inverter/buffer is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic−level conversio

Hex Buffers

The MC14049UB hex inverter/buffer is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. This complementary MOS device finds primary use where low power dissipation and/or high noise immunity is desired. This device provides logic−level conversio