첨2/4,첨4/6 Clock Generation Chip

The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The MC100EL39 is pin and functionally equivalent to the MC100LVEL39 but is specified for operation at the standard 100K ECL voltage supply. • 50ps Output-to-Output S

3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip

Description The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differ

3.3V ECL Clock Generation Chip

文件：160.08 Kbytes Page：6 Pages

첨2/4,첨4/6 Clock Generation Chip

The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The MC100EL39 is pin and functionally equivalent to the MC100LVEL39 but is specified for operation at the standard 100K ECL voltage supply. • 50ps Output-to-Output S

3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip

Description The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differ

3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip

Description The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differ

3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip

Description The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differ

3.3V ECL 첨2/4, 첨4/6 Clock Generation Chip

Description The MC100LVEL39 is a low skew ÷2/4, ÷4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differ

3.3V ECL Clock Generation Chip

文件：160.08 Kbytes Page：6 Pages

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC CLOCK GEN ECL 2/4 4/6 20SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：卷带（TR） 描述：IC CLOCK GEN ECL 2:4 4/6 20SOIC 集成电路（IC） 时钟发生器，PLL，频率合成器

3.3V ECL Clock Generation Chip

文件：160.08 Kbytes Page：6 Pages